Many thanks for that detailed reply.
I found gpio_get_irq_event_mask() and gpio_add_raw_irq_handler_masked(). Now I figured out how to get the pin and the event, I hooked up common ISR to sift through all the possibilities. It looks rather clunky but if the interrupts are shared, I suppose that's the way it has to work.
I suppose I could split the job to use two ISRs for three pins each.
I have something which compiles, now to find out if it catches any fish. ![;)]( "Wink")
Thanks for the help.
I found gpio_get_irq_event_mask() and gpio_add_raw_irq_handler_masked(). Now I figured out how to get the pin and the event, I hooked up common ISR to sift through all the possibilities. It looks rather clunky but if the interrupts are shared, I suppose that's the way it has to work.
I suppose I could split the job to use two ISRs for three pins each.
Code:
const uint32_t gpio_all_RC= 1<<ch1Pin || 1<<ch2Pin || 1<<ch3Pin || 1<<ch4Pin || 1<<ch5Pin || 1<<ch6Pin; const uint32_t level_change = GPIO_IRQ_EDGE_RISE /*0x4u*/ + GPIO_IRQ_EDGE_FALL/*0x8u*/;void ISR_all_pins(void) { if (gpio_get_irq_event_mask(ch1Pin) & level_change ) { // Return the current interrupt status (pending events) for the given GPIO. getCh1(); // handle the IRQ gpio_acknowledge_irq(ch1Pin, level_change); } if (gpio_get_irq_event_mask(ch2Pin) & level_change) { getCh2(); // handle the IRQ gpio_acknowledge_irq(ch2Pin, level_change); }....
Thanks for the help.
Statistics: Posted by pie_face — Sun Aug 04, 2024 5:02 pm