Based on the bus-pirate schematic, VREG_LX, VREG_VIN and VREG_FB should be left floating, with VREG_AVDD and VREG_VIN connected to +3v3 via a low-R RC circuit...
I haven't got the parts to have the circuits made yet, but I have a few boards based around that design - it will probably work out cheaper to use the LDO than the specific orientationally-challenged inductor that RasPi are recommending. Here's what the power-details on my schematic look like:
I've already taken the (*cough *) executive decision to allow placement on both the top and bottom, and to use 0201 where necessary, so it was pretty easy to fit "PS1" into the mix:
I haven't got the parts to have the circuits made yet, but I have a few boards based around that design - it will probably work out cheaper to use the LDO than the specific orientationally-challenged inductor that RasPi are recommending. Here's what the power-details on my schematic look like:
Statistics: Posted by ThrudTheBarbarian — Mon Sep 02, 2024 2:49 am