So technically it s not the probe that is flaky but the RP2040 itself, if it gets into state that SWD is not working.
This would be solvable by adding RESET signal to the probe that would be connected to RESET pin of the CPU.
Most SWD (and JTAG) probes have has extra RST pin for that and I think in openocd the target reset procedure used e.g. in 'reset halt' command can be configured to use such reset pin instead of doing the reset via SWD commands. Then you are sure you can get the CPU to known initial state every time.
But still if you then let the application run and it breaks SWD or turns it off, it can still happen. On many chips SWD pins can be reconfigured to be generic GPIO so when this happens and SWD is lost, it is a feature, not a bug.
This would be solvable by adding RESET signal to the probe that would be connected to RESET pin of the CPU.
Most SWD (and JTAG) probes have has extra RST pin for that and I think in openocd the target reset procedure used e.g. in 'reset halt' command can be configured to use such reset pin instead of doing the reset via SWD commands. Then you are sure you can get the CPU to known initial state every time.
But still if you then let the application run and it breaks SWD or turns it off, it can still happen. On many chips SWD pins can be reconfigured to be generic GPIO so when this happens and SWD is lost, it is a feature, not a bug.
Statistics: Posted by fanoush — Fri Dec 06, 2024 2:19 pm